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Anglický jazyk
High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip
Autor: Anupam Chattopadhyay
This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques...
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O knihe
This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliability estimation as well as architecture-level and system-level fault tolerant designs. It also presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures.
- Vydavateľstvo: Springer Nature Singapore
- Rok vydania: 2017
- Formát: Hardback
- Rozmer: 241 x 160 mm
- Jazyk: Anglický jazyk
- ISBN: 9789811010729
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