Semiconductor device fabrication

Source: Wikipedia. Pages: 121. Chapters: Advanced Silicon Etch, Airgap (microelectronics), Alfred Y. Cho, B-staging, Back end of line, Ball bonding, Barrier metal, Beam lead technology, Bond characterization, Borophosphosilicate glass, Bow and warp of semiconductor wafers and substrates, Capacitance voltage profiling, Channel-stopper, Chemical-mechanical planarization, Chemical vapor deposition, Cleanroom, Common Platform, Dark current spectroscopy, Deal-Grove model, Deep reactive-ion etching, Device under test, Dicing tape, Die preparation, Doping (semiconductor), Drive Level Capacitance Profiling, Dry etching, Electron beam induced current, Electrostatic spray assisted vapour deposition, Epitaxy, Epiwafer, Etching (microfabrication), Evaporation (deposition), EV Group, Fabless manufacturing, Finetech, Focused ion beam, FOUP, Front end of line, Furnace anneal, Gas immersion laser doping, Gate count, Hardmask, Health hazards in semiconductor manufacturing occupations, High-Speed SECS Message Services, Homotopotaxy, Hydride vapour phase epitaxy, Integrated circuit packaging, Integrated device manufacturer, Ion beam lithography, Ion beam mixing, Ion implantation, Ion Layer Gas Reaction, Kinetic Monte Carlo surface growth method, Klaiber's law, Laser trimming, Layer (electronics), Lift-off (microtechnology), List of semiconductor fabrication plants, Metal-induced crystallization, Metalorganic vapour phase epitaxy, Micropipe, Monolayer doping, MOSIS, Multi-project wafer service, Negative bias temperature instability, Non-contact wafer testing, Ohmic contact, Oramir, Overlay Control, Package on package, Phenol formaldehyde resin, Physical vapor deposition, Planar process, Plasma-enhanced chemical vapor deposition, Plasma-immersion ion implantation, Plasma ashing, Plasma cleaning, Plasma etcher, Plasma etching, Polycide, Probe card, Process design kit, Process variation (semiconductor), Product engineering, PROLITH, Pulsed laser deposition, Rapid thermal processing, RCA clean, Redistribution layer, Reliability (semiconductor), Resist, Restrictive design rules, Rigid needle adapter, Salicide, SECS/GEM, Selective area epitaxy, Semiconductor Equipment and Materials International, Semiconductor industry, Shallow trench isolation, Silicon intellectual property, Silicon on sapphire, Smart Cut, Smif interface, Spin coating, Spreading Resistance Profiling, Sputter deposition, Strained silicon directly on insulator, Stress migration, Substrate mapping, Tetrakis(dimethylamido)titanium, Thermosonic bonding, Three-dimensional integrated circuit, Through-silicon via, Titanium nitride, Triethylgallium, Trimethylgallium, Ultra-high-purity steam for oxidation and annealing, Vapour phase decomposition, Wafer-scale integration, Wafer (electronics), Wafer backgrinding, Wafer dicing, Wafer fabrication, Wire bonding. Excerpt: Ultra-high-purity steam, also called clean steam, UHP steam or high purity water vapor, is used in a variety of industrial manufacturing processes that require oxidation or annealing. These processes include oxide layers grow on silicon wafers for the semiconductor industry and for passivation layers used to improve the light capture ability of crystalline photovoltaic cells. Several methods and technologies can be employed to generate ultra high purity steam, including pyrolysis, bubbling, direct liquid injection and purified steam generation. The level of purity, or the relative lack of contamination, affects the quality of the oxide layer...