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Anglický jazyk
ASIC Implementation of Low Power FP-AU using Reversible Logic
Autor: Vijeyakumar Krishnasamy Natarajan
This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of... Viac o knihe
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O knihe
This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of reversible arithmetic circuits. Chapter 3 describes the realization of basic gates in reversible logic. ASIC design of reversible floating point adder is discussed in chapter 4. In Chapter 5 ASIC design of reversible floating point multiplier is deliberated. Finally, chapter 6 concludes the work.
- Vydavateľstvo: LAP LAMBERT Academic Publishing
- Rok vydania: 2018
- Formát: Paperback
- Rozmer: 220 x 150 mm
- Jazyk: Anglický jazyk
- ISBN: 9786139587056
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