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Anglický jazyk
Low Power Wallace Multiplier
Autor: Inamul Hussain
Multipliers are basic building blocks of many VLSI computational units. The performance of such VLSI circuits depends on the performance of multipliers. A multiplier is also one of the key hardware blocks in most digital signal processing (DSP) systems.... Viac o knihe
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O knihe
Multipliers are basic building blocks of many VLSI computational units. The performance of such VLSI circuits depends on the performance of multipliers. A multiplier is also one of the key hardware blocks in most digital signal processing (DSP) systems. Typical in DSP applications, where a multiplier plays an important role include digital filtering, digital communications and spectral analysis. Since multipliers are rather complex circuits and must typically operate at a high system clock rate, reducing the delay of a multiplier is an essential part of satisfying the overall design. So designing a fast multiplier is a challenging task for VLSI designers. There are various types of multipliers are available such as the array multiplier, carry-save multiplier, Wallace-tree multiplier, etc. Among this Wallace-tree multiplier or Wallace multiplier has been a very popular design due to its fast speed and low power. In this book, a design prospective of a low power Wallace Multiplier has been presented.
- Vydavateľstvo: LAP LAMBERT Academic Publishing
- Rok vydania: 2020
- Formát: Paperback
- Rozmer: 220 x 150 mm
- Jazyk: Anglický jazyk
- ISBN: 9786200783417
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